Putting microelectronics to the test


A group of people looks at test circuitry on a table in a lab

ASU electrical engineering Professor Sule Ozev (left) shows test circuitry developed for the EEE 522 Radio Frequency Test class to Raghu Maddali (second from left), a senior director of test engineering at NXP Semiconductors; Paul Hirsch (second from right), an Advantest global senior account manager; and Duane Brown, an Advantest application engineering manager. Photo courtesy Paul Hirsch/Advantest

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Spurred by the CHIPS and Science Act and a thriving microelectronics ecosystem in the state supported by Arizona State University, the semiconductor manufacturing renaissance in the U.S. is sparking a rapidly growing need for semiconductor test engineers.

Test engineers ensure that semiconductor chips operate properly under a variety of conditions by examining them for defects and out-of-tolerance process deviations.

While a chip may seem to function well for most of its uses, it takes only a missed operating condition in testing to cause a small number of users to experience significant failures in electronic systems.

“During testing, all defects, including the stealthy ones, need to be detected,” said Sule Ozev, a professor of electrical engineering in the Ira A. Fulton Schools of Engineering at ASU. “A test engineer’s job is to work like a detective and find the correct test patterns, similar to interrogating a suspect, so that all possible defects are activated during testing to ensure that no defective part is shipped to the customer.”

To help meet the increasing demand for semiconductor test engineers, microelectronics testing equipment company Advantest and chip manufacturer NXP Semiconductors approached ASU to address their need for training in the field.

“ASU, which has one of the most renowned engineering schools in the country, is right in our backyard and a natural collaborator to further develop engineering talent,” said Raghu Maddali, a senior director of test engineering at NXP.

This resulted in EEE 522 Radio Frequency Test, a graduate-level electrical engineering class open to undergraduate students and developed by Ozev in collaboration with Advantest and NXP, which debuted in the spring 2023 semester, with nine students enrolled.

Testing the limits of semiconductor education

Inspiration for the class emerged from a lack of semiconductor test engineering courses, especially those in the area of mixed-signal and radio frequency, or RF, communications chips. Ozev said ASU is one of only a handful of colleges in the U.S. offering such a course.

She focuses the class specifically on mixed-signal and RF chips to help students thoroughly understand RF testing and streamline industry processes. Mixed-signal chips are those that include both analog and digital circuits in their design.

“Mixed-signal and RF testing is generally quite ad hoc in industry,” Ozev said. “Each new product requires its own approach to testing. This domain can benefit greatly from a systemic approach to testing and evaluation of test quality.”

In addition to classroom time under Ozev’s instruction, the course gives students hands-on lab experience in microelectronics testing under the supervision of NXP and Advantest test engineers. The course also uses equipment donated by Advantest and installed at ASU’s MacroTechnology Works facility.

Paul Hirsch, a senior global account manager and representative from Advantest involved in the course’s development, praised ASU’s efforts to bring the course to life.

“The process of working with ASU was remarkable,” Hirsch said. “We felt that all ASU team members were open and positive in their interactions with NXP and Advantest. They rapidly understood the benefit of our collaboration and did their best to open the doors for us.”

Ferhat Can Ataman, an electrical engineering graduate student at ASU, took the course to advance his knowledge in millimeter-wave radar research. He sought to understand how RF semiconductor testing is performed to improve the accuracy of his radar calibration.

“This class’s laboratory gave me an opportunity to gain practical experience,” Ataman said. “I gained experience with industry-standard test tools and real-world RF testing scenarios.”

He said the class taught him about the importance of integrating testing methods when designing a semiconductor chip, including built-in self-test technology, or BIST. This technology is integrated into the design of chips and detects when the chips malfunction, similar to a car’s check engine light.

Ataman found the experience valuable and now understands how testing large batches of chips is conducted in industry settings.

“If a student is working on RF technology, they definitely need to take this course,” he said. “The course is aligned with what is important in industry, from cost to accuracy of testing. This course fills the gap between theory and real-world application.”

Charting a future semiconductor testing course

ASU plans to offer the course with the collaboration of Advantest and NXP each year in the fall and spring semesters. Hirsch is enthusiastic about continuing Advantest’s efforts with ASU to further semiconductor education.

“The expansion of the semiconductor industry across the U.S. will only increase the need for a strong partnership between our universities and industry,” he said. “ASU, Advantest and NXP are providing a good example.”

Ozev has already seen two of the class’s students accepted for internships in analog and RF testing. The course’s next offering in the fall 2023 semester will increase the available seats to 20.

Ishaan Bassi, Ozev’s doctoral student who has worked at Advantest for six months, will teach the fall 2023 class. Ozev will then teach regularly in subsequent fall semesters, while industry collaborators will offer the course each year in the spring semester.

Future plans also include developing another electronics testing course designed to be taken after EEE 522 Radio Frequency Test, which would teach students more complex testing procedures, such as how to debug problems with chips and design a device interface board — a printed circuit board that connects the tester equipment to the chip being tested.

“This course will provide our graduates an edge when looking for jobs after graduation because they will already have skills that companies spend about six months training employees in,” Ozev said. “Furthermore, because they are exposed to ideas on new and systemic ways to test devices, they can help transform testing approaches in their companies.”

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