ASU's Cao receives National Science Foundation Career Award
The award comes with a grant of $404,000 over five years for Cao's efforts to advance knowledge in nanoscale electronics design.
Cao says he wants to help bridge the knowledge gap between nanometer technology and integrated circuit design.
He plans to do research in the use of nanoscale silicon transistors and components from other emerging technologies, such as the carbon nanotube, to devise more reliable nanoelectronics systems.
Today's microprocessor chip typically consists of billions of nanoscale devices, each smaller than 100 nanometers about one-thousandth the diameter of a typical human hair. These extremely small-scale devices inevitably suffer from a drastic amount of variations resulting from the manufacturing process, the operation environment, or even from being hit by radioactive particles.
“The biggest challenge for nanoscale design is how to deal with these variations and guarantee the quality of design,” Cao says. “A seamless integration of manufacturing, device, circuit and tools is the key to identifying design needs and exploring solutions.”
He'll be working to develop the infrastructure and tools to strengthen such integration and produce more reliable nanoscale systems that achieve high performance while requiring minimal power use.
Improvements in circuit speed, power and yield will translate into lower costs in design and manufacturing, and shorten the time it takes to bring products to the market, he says.
Cao will employ specially designed curricula and web-based dissemination tools to teach ASU students about such advances.
Cao joined ASU in 2004 after obtaining a doctoral degree in electrical engineering from the University of California-Berkeley. Earlier this year, he received the IBM Faculty Award as part of a global program that strives to develop collaborations between IBM researchers and faculty at leading universities.